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fcvt.l.s not hitting invalid flag coverpoint #384

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davidharrishmc opened this issue Dec 26, 2024 · 0 comments
Open

fcvt.l.s not hitting invalid flag coverpoint #384

davidharrishmc opened this issue Dec 26, 2024 · 0 comments

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@davidharrishmc
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The fcvt.l.s with a signaling NaN is unexpectedly not hitting the invalid flag coverpoint.

In the log, the fcvt of 7bffffff sets the invalid flag as expected

wsim rv64gc tests/rv64/F/WALLY-COV-fcvt.l.s.elf --lockstepverbose > log
 Info 1751: 'refRoot/cpu', 0x0000000080001b58(rvtest_entry_point+1b58): Machine 00012e07 flw     f28,0(x2)
# Info   MEMX 0x80001b58 0x80001b58 2 2e07
# Info   MEMX 0x80001b5a 0x80001b5a 2 0001
# Info   MEMR 0x80004000 0x80004000 4 7fbfffff
# Info   f28 ffffffff00400000 -> ffffffff7fbfffff
# Info 1752: 'refRoot/cpu', 0x0000000080001b5c(rvtest_entry_point+1b5c): Machine c02e76d3 fcvt.l.s x13,f28
# Info   MEMX 0x80001b5c 0x80001b5c 2 76d3
# Info   MEMX 0x80001b5e 0x80001b5e 2 c02e
# Info   x13 ac75c94e9c8a444f -> 7fffffffffffffff
# Info   fflags 0000000000000000 -> 0000000000000010 [NV:0->1 DZ:0 OF:0 UF:0 NX:0]
# Info   fcsr 0000000000000000 -> 0000000000000010 [NV:0->1 DZ:0 OF:0 UF:0 NX:0 FRM:0(RNE)]

But in the coverage report, NV is not hit.

    Coverpoint cp_csr_fflags_von                       66.66%        100          -    Uncovered            
        covered/total bins:                                 2          3          -                      
        missing/total bins:                                 1          3          -                      
        % Hit:                                         66.66%        100          -                      
        bin NV                                              0          1          -    ZERO            

even though the flags in fcov/unpriv/F_coverage.svh look good

covergroup F_fsw_cg with function sample(ins_f_t ins);
...
    cp_csr_fflags_von : coverpoint get_csr_val(ins.hart, ins.issue, `SAMPLE_BEFORE, "fcsr", "fflags") iff (ins.trap == 0 )  {
        //Value of FCSR.fflags
        wildcard bins NV  = (5'b0???? => 5'b1????);
        wildcard bins OF  = (5'b??0?? => 5'b??1??);
        wildcard bins NX  = (5'b????0 => 5'b????1);
    }
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